Download Computational Intelligence in Analog and Mixed-Signal (AMS) by Mourad Fakhfakh, Esteban Tlelo-Cuautle, Patrick Siarry PDF

By Mourad Fakhfakh, Esteban Tlelo-Cuautle, Patrick Siarry

This ebook explains the applying of modern advances in computational intelligence – algorithms, layout methodologies, and synthesis innovations – to the layout of built-in circuits and platforms. It highlights new biasing and sizing techniques and optimization ideas and their software to the layout of high-performance electronic, VLSI, radio-frequency, and mixed-signal circuits and systems.

This first of 2 comparable volumes addresses the layout of analog and mixed-signal (AMS) and radio-frequency (RF) circuits, with 17 chapters grouped into elements on analog and mixed-signal functions, and radio-frequency layout. it is going to be of curiosity to practitioners and researchers in laptop technology and electronics engineering engaged with the layout of digital circuits.

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Extra resources for Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design

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3 Performance trade-offs of OTA3 F. Jiao et al. 3 compare the trade-offs of the low voltage current mirror (M7, M9, M11, and M13) (OTA) and basic current mirror (M11 and M13) (OTA3). The tables only include the variables that cause different effects on gain, noise, and bandwidth. 3 indicates a higher flexibility of gain and pole position because of the cascode devices M7 and M9. The additional term gms9 =gmd9 introduces an enhanced DC gain for the low voltage current mirror structure. Design step N3 adds a cascode current source biasing to the circuit.

Jiao et al. common mode control system pseudo differential input pair fully differential structure nonlinearity cancellation combine initial ideas N1 justified step for the specific implementation of nonlinearity cancellation input stage N2 justified step for the specific implementation of common mode control system N3 justified step for low voltage current mirror N4 justified step for linear region transistors N5 justified step for current source biasing Fig. 10 Initial ideas and design sequences for circuit 3 common-mode control system, pseudodifferential input pair, fully differential structure, and nonlinearity cancelation.

The aspects of yield considered here are the percentage of devices, which meet the specification and the design centering with respect to the specification. Another important aspect is avoiding over-design, when the circuit characteristics are within specification but with a wide margin, which could be at the expense of area or power and ultimately, cost. Although not recommended, this strategy is still in use by most of the analog design teams because of the low level of design automation. A typical design process is iterative, first for finding a solution which meets the nominal specification, and then moving on to a solution that meets yield and economic constraints, including the effects of variations in device characteristics.

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